PENTEK Industrial Partner

53660 - Pentek 53660 - 4-Channel 200 MHz, 16-bit A/D with...

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Part Number:
53660
Model Number:
53660
Make:
PENTEK
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Pentek 53660 - 4-Channel 200 MHz, 16-bit A/D with Virtex-6 FPGA - 3U VPX Simple Type: Data Acquisition

Model 53660 is a member of the Cobalt family of high performance 3U VPX boards based on the Xilinx Virtex-6 FPGA. A multi-channel, high-speed data converter, it is uitable for connection to HF or IF ports of a communications or radar system. Its built in data capture features offer an ideal turnkey solution. The 53660 includes four A/Ds and four banks of memory. It features built-in support for PCI Express over the 3U VPX backplane.

Download the datasheet (PDF)

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Features

  • 3U VPX form factor provides a compact, rugged platform
  • Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX System Specification)
  • Complete radar and software radio interface solution
  • Four 200 MHz 16-bit A/Ds
  • LVDS connections to the Virtex-6 FPGA for custom I/O
  • LVPECL clock/sync bus for multiboard synchronization
  • Ruggedized and conduction-cooled versions available
  • Sample clock synchronization to an external system reference
  • Supports gigabit serial fabrics including PCI Express, Serial RapidIO and Xilinx Aurora
  • Supports Xilinx Virtex-6 LXT and SXT FPGAs
  • Up to 2 GB of DDR3 SDRAM or 32 MB of QDRII+ SRAM

Specifications

    General
  • A/D Converters: Type: Texas Instruments ADS5485 Sampling Rate: 10 MHz to 200 MHz. Resolution: 16 bits Sample Clock Sources: On-board clock synthesizer
  • Clock Source: Selectable from on-board programmable VCXO (10 to 810 MHz), front panel external clock or LVPECL timing bus. Synchronization: VCXO can be locked to an external 4 to 180 MHz PLL system reference, typically 10 MHz. Clock Dividers: External clock or VCXO can be divided by 1, 2, 4, 8, or 16 for the A/D clock
  • External Clock: Type: Front panel female SSMC connector, sine wave, 0 to +10 dBm, AC-coupled, 50 ohms, accepts 10 to 800 MHz divider input clock or PLL system reference. Timing Bus: 26-pin front panel connector LVPECL bus includes, clock/sync/ gate/PPS inputs and outputs; TTL signal for gate/trigger and sync/PPS inputs
  • External Trigger Input: Type: Front panel female SSMC connector, LVTTL. Function: Programmable functions. include: trigger, gate, sync and PPS
  • Front Panel Analog Signal Inputs: Input Type: Transformer-coupled, front panel female SSMC connectors. Transformer Type: Coil Craft. WBC4-6TLB. Full Scale Input: +8 dBm into 50 ohm. 3 dB Passband: 300 kHz to 700 MHz
  • PCI Express Bus: Gen. 1: x4 or x8; Gen. 2: x4

 

Applications

  • None Available

Aliases

  • None Available